1. Field of the Invention
This invention is related to the field of digital systems and, more particularly, to handling quality of service (QoS) issues in memory accesses generated within the system.
2. Description of the Related Art
Most digital systems include a variety of devices that need access to memory (e.g. processors, peripherals, etc.). For example, a processor accesses memory to read instructions for execution, to read and write data during execution of the instructions, etc. Various devices read and write data as well. For example, video/graphics devices write data representing images to be displayed, read data for display, etc. A network device reads and writes packet data to/from memory. A mass storage device writes stored data being transferred to memory, or reads memory data being transferred to the mass storage device.
With numerous devices potentially accessing memory, a mechanism is needed for selecting among read and write operations from various devices, ordering the operations from different devices, etc. The mechanism needs to balance performance requirements of the devices (which differ, depending on the type of device) as well as providing good memory performance (e.g. grouping operations to the same page of memory to improve memory bandwidth utilization and reduce average power consumption, etc.).
Some devices are categorized as real-time devices. These devices are characterized by a need to receive data at a certain rate in real time, or erroneous operation may occur. For example, video data needs to be provided within the frame rate of the video, or visual artifacts may occur on the display. Similarly, audio devices are real time: if the audio data is not available at the audio rate, skips in the audio playback may occur. Other devices are non-real time, such as processors. Non-real time devices can perform better if data is provided more rapidly, but will not have erroneous operation if data is not provided as rapidly.
One mechanism that can be used to balance the requirements of real time and non-real time device is QoS. The real time device can be provided with several levels of QoS, with increasing levels of priority. As the need for data becomes more critical to prevent erroneous operation, the device can issue memory operations with higher levels of QoS. The memory controller can respond more rapidly to the higher QoS memory operations, preventing the erroneous operation that might otherwise occur. The non-real time deices can also be provided with QoS levels to rank against the real time QoS levels.
There are costs for issuing the higher QoS memory operations, at the system level. The memory controller may bypass other memory operations that might be more efficiently performed together (e.g. memory operations that are to an already-open page in the memory). Accordingly, overall system performance can suffer if the QoS levels of real time memory operations are increased too frequently. Because erroneous operation occurs for real time devices if their data needs are not met, the determination of which QoS level to use for a given memory operation is made conservatively (i.e. assuming a worst case scenario in terms of memory load from other devices in the system). While such determinations can ensure the correct operation of the real time devices, the increase in QoS levels can occur more frequently then necessary if the worst case scenario is not in effect, reducing memory bandwidth utilization and increasing power consumption in the memory unnecessarily.